CoaXPress AXI IP Core
The CoaXPress™ AXI™ IP Core from Mercury Computer Systems is a high-performance core supporting the industry standard for transmission of video and still images. A single downlink of up to 6.25 Gbps is supported for image transfer as well as a 20Mbps uplink for communications and control. The CoaXPress AXI IP Core is intended to be implemented on an Altera® or Xilinx® FPGA. Internal to the FPGA, 32-bit AXI4 interfaces are provided for data and control handoffs. External bidirectional Coax Tranceivers are required.
- Support for both ends of CXP-6 up to 6.25 Gbps downlink, 20.83 Mbps uplink
- 32-bit AXI4 master/slave interfaces for downlink/control
- Glueless interface to CoaXPress tranceiver
- Altera and Xilinx FPGAs supported
- Royalty free solution
- Low latency, precise triggering, fixed delays and long cable lengths provide support for emerging imaging applications
- Streamlines the integration of imaging solutions with FPGA-based architectures when combined withMercury’s CoaXPress AXI IP Core
- Supports JIIA NIF-001-2010 CoaXPress Standard
- Parameterizable to operate as device or host
- CoaXPress Master link support
- Downlink operation up to (CXP-6) 6.25 Gbps
- Uplink operates at 20.83 Mbps
- AXI4 Stream Interface Profile (32-bit slave port); used in “Device” mode to generate streaming data packets on CoaXPress port
- AXI4 Stream Interface Profile (32-bit master port); used in “Host” mode to receive streaming data packets from CoaXPress port
- AXI4L Interface Profile (32-bit slave port); used in “Host” mode to generate control command packets on CoaXPress port and to access local host register set
- AXI4L Interface Profile (32-bit master port); used in “Device” mode to receive control command packets from CoaXPress port
- Dedicated ports to generate/receive GPIO and trigger packets on CoaXPress
- CoaXPress Link Initialization State Machine (with soft reset capability)
- Embedded CRC-32 generate/check for streaming data packets
- Device mode stream data packet size supporting imaging frames greater than 1024 bytes
- Back-pressure support on AXI4 interface