Specifications
UltraSPARC IIi+ processor: 650 MHz
V9 architecture with VIS instruction set
Caches (all caches 4-way set associative)
L1 instruction cache: 16 KB
L1 data cache: 16 KB
L2 internal unified cache: 512 KB
Single-slot 6U CompactPCI (PICMG 2.0 R3.0) board
Supports auto-sensing of system or non-system slot functionality
Hot-swappable, PICMG 2.1 R2.0
BMC or standard node capability
Per PICMG 2.9 R1.0 System Management Specification
Temperature and voltage sensors
2-level Watchdog timer
CompactPCI connector J4
Not populated to avoid conflict with H.110 computer telephony bus
Open boot firmware
Power-on self-test (POST)
2 LEDs
One for POST results
One user-controlled
Real-time clock
Solaris™ Version 8 or 10
Memory and Storage
NVRAM: 32 KB
SDRAM with ECC: 1 or 2 GB, 108 MHz
SDRAM soldered directly to baseboard: 1-2 GB
Two socketed Flash PROMs: 512 KB
Either is selectable as boot device via a jumper
One reserved for Open Firmware
One available for user data, programs, or NVRAM data backup
I/O Options
Main board
Two 10/100/1000 BaseT Gigabit Ethernet ports
Routed to PICMG 2.16 packet-switched backplane connection on J3
Two PMC slots: 64-bit, 33 MHz
IEEE P1386 / P1386.1 compliant
One has rear I/O PIM support
PCI interface to rear I/O module: 64-bit
Rear I/O modules
Currently available with SCSI, Ethernet, and serial ports
RS-232 communication port interfaces
To front panel RJ11 connector or J3 for rear I/O
Environmental
Required voltages
VCC: +5V dc (+5%/-3%)
VDD: +3.3V dc (+5%/-3%)
+12V not used, but routed to PMC slots
-12V not used, but routed to PMC slots
Power consumption
VCC: 2.0A (10.0W) typ, 3.2A (16.0W) max
VDD: 3.9A (12.9W) typ, 5.3A (17.5W) max
Temperature
Operating: 0°C to 55°C, minimum 250 LFM airflow
Storage: -40°C to +85°C