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Ensemble 2000 Series
MTI-203 RapidIO DSP FPGA Signal and Video Processing AdvancedMC Card

Ensemble® 2000 Series MTI-203 RapidIO® DSP/FPGA Signal and Video Processing AdvancedMC® Card is an ideal solution for developing and deploying LTE, WiMAX, next-generation video, or base-station applications. With three TCI6482 DSPs and a supporting Xilinx® FPGA node, the module enables all the physical layer (PHY) baseband processing required for a 20-MHz, TDD (time division duplex), multi-antenna solution with Smart Antenna MIMO (multiple input/output) enabled. As a baseband development platform, The MTI-203 is designed to support advanced features such as Smart Antenna and MIMO transmission across a variety of air interfaces.

WiMAX is an evolving standard (802.16x) for point-to-multipoint wireless networking.

  • Three TCI6482 DSPs at 1.2 GHz each
  • One Xilinx Virtex™-4 FX100 FPGA with dual integrated Power Architecture™ cores, running at 400 MHz
  • Two 4x RapidIO fat pipes for data exchange
  • Two 1-Gigabit Ethernet ports for configuration and control
  • High-performance AMC for next-generation mobile broadband applications
  • Supports 20-MHz WiMAX multi-antenna solutions on a single AMC
  • Combined DSP and FPGA technology enables optimal application partitioning
  • Exceptional flexibility and value for LTE and WiMAX base-station developers

Digital signal processors
Three TI TMS320TCI6482 DSPs: 1.2 GHz
Serial RapidIO interfaces: 1.25 Gb, 2.5 Gb, or 3.125 Gbps
JTAG/emulation support
2-wire EEPROM support
McBSP bus support
Code compatible with the TMS320C6455
RGMII Gigabit Ethernet supported on DSP_A and DSP_B
EMIF_A path from DSP_C to the FPGA
EMIF_A path from DSP_B to the FPGA SelectMAP to support reconfiguration

Field-programmable gate array (FPGA)
Xilinx Virtex-4 FX100 (compatible with Xilinx Virtex-4 FX60)
Reconfigurable from Xilinx platform flash (XCF32P)
LVDS bus support
One 4x serial RapidIO interface to serial RapidIO switch
One 4x serial RapidIO/10-Gigabit Ethernet interface to AMC connector

MemoryDDRII 250-MHz SDRAM per DSP: 64 MB
16-bit DDRII interface
Flash (DSP_A): 16 MB

Serial RapidIO switchTundra® Tsi578™ 8-port serial RapidIO switch
Gbps support: 1.25, 2.5, and 3.125

EthernetFX100 FPGA performs Gigabit Ethernet PHY functions between AMC Ports 0 and 1 and DSP_A and DSP_B, respectively.

IPMIHitachi® HD64F2166 IPMI controller
Voltage monitor
Geographical address monitor
Temperature monitors
Power/reset control
DSP and serial RapidIO switch EEPROM interfaces
FPGA and CFG CPLD interfaces

AMC connectorDual 10/100/1000 Ethernet (Ports 0-1)
4x serial RapidIO (Ports 4-7)
4x serial RapidIO or 10-Gigabit Ethernet port (Ports 8-11)
IPMB-A and IPMB-B link
Front panel
Per AMC.0, LEDs on front panel
   Out of service: Red
   User LED2: Green
   User LED3: Yellow
   Hot swap: Blue
DSP LED for each DSP
Two FPGA LEDs
FPGA LVDS connector
JTAG debug connector
Reset push-button

Test and development
14-pin front-panel JTAG/emulator/programming connector for DSPs and IPMI
14-pin non-front-panel JTAG/emulator/programming connector for Xilinx FPGA and platform flash
4 AMC-specified LEDs
8 user-defined LEDs

MechanicalFull- or mid-height AMC, single-width AMC
Width: 28.96 mm
Depth: 208.53 mm
Height: 73.81 mm
Supports AMC B+ bays

EnvironmentalTemperature
   Operating: 0°C to 45°C at 10,000 ft
   Storage: -40°C to +85°C
Humidity 
   Operating: 10-90% non-condensing
Vibration: 0.003g2/Hz, 20-2000 Hz, 1 hr/axis
Shock: x and y axes: 32g; z axis: 20g; 11 ms, half-sine

Power Consumption12V payload: 30W typical, 40W max
3.3V management: 0.25W typical, 0.5W max

Specification compliance
AMC.0 Rev 2.0 compliant
Hot swap support

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