Specifications
A/D Conversion
4 channels (2 per FMC)
16-bit, 130 MSPS A/D
or 4 channels (2 per FMC)
14-bit, 250 MSPS A/D
or 4 channels (4 via double-wide FMC)
10-bit, 1.5 GSPS
FPGAs
2 prosecutor FPGAs
Xilinx Virtex-5 SX240T or Xilinx Virtex-5 LX330T
1 governor FPGA
Xilinx Virtex-5 SX240T or Xilinx Virtex-5 LX330T
Memory
DDR2-SDRAM: 3 banks
One bank: 256 MB
QDR2-SRAM: 3 banks
One bank: 9 MB
Datapaths
FMC 1 to Prosecutor 1
80 LVDS pairs at up to 1 Gb/s per pair
10 GTP lanes at up to 3.125 Gb/s per lane
FMC 2 to Prosecutor 2
80 LVDS pairs at up to 1 Gb/s per link
10 GTP lanes at up to 3.125 Gb/s per lane
Prosecutor FPGA 1 to QSFP 1
4 GTP lanes at up to 3.125 Gb/s per lane
Prosecutor FPGA 2 to QSFP 2
4 GTP lanes at up to 3.125 Gb/s per lane
Prosecutor FPGA 1 to Prosecutor FPGA 2
32 full-duplex HSDL links at up to 4 GB/s
Prosecutor FPGA 1 to Governor FPGA
16 full-duplex HSDL links at up to 2 GB/s
8 full-duplex HDSL links at up to 1 GB/s
8 GTP lanes at up to 3.125 Gb/s per lane
Prosecutor FPGA 2 to Governor FPGA
16 full-duplex HSDL links at up to 2 GB/s
8 full-duplex HDSL links at up to 1 GB/s
8 GTP lanes at up to 3.125 Gb/s per lane
Environmental
Ruggedization level: VH
Temperature
Operating: 0ºC to 40ºC with 15 CFM per slot of airflow
Storage: -40ºC to +85ºC
Conduction-cooled: Consult factory.